On 11/06/2014 12:36 PM, Noralf Tronnes wrote:What makes i2c so special that it should be enabled by default?
Den 06.11.2014 00:45, skrev Matthias Klein:Yes.
The model B and B+ differ in the GPIO lines for ACT and PWR leds, and the<snip>
I2S interface.
Signed-off-by: Matthias Klein <matthias.klein@xxxxxxxxx>
---
Changes in v2:
- move the common parts between the B and B+ model into the new
bcm2835-rpi.dtsi file
- add the I2S signals to the B+ file which fix the problem that USB is
not working
with the current bcm2835-rpi-b.dts file on the B+.
---
+&gpio {AFAIK these pins will always be configured regardless of whether they
+ pinctrl-names = "default";
+
+ gpioout: gpioout {
+ brcm,pins = <6>;
+ brcm,function = <1>; /* GPIO out */
+ };
+
+ alt0: alt0 {
+ brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
+ brcm,function = <4>; /* alt0 */
+ };
+
+ alt3: alt3 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <7>; /* alt3 */
+ };
+};
are used by a driver or not.
Could we do something like this for SPI and I2C, configuring only when...
needed?
&spi {It's certainly possible, but I don't really see any advantage. I'd much
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
};
rather see the pinmux set up correctly all in one go as early as possible.
Yes, I think so. Whichever I2C controllers are actually connected to+&i2c0 {Should the I2C busses be enabled by default?
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
something (even bare pins on an IO connector) should be enabled by the
DT, so that they're available for use.
This will happen solely in the firmware. The firmware reads the eeprom,On Raspian, i2c is disabledIt sounds like for I2C-0 on the B+ should use the i2c-mux-pinctrl.c to
by blacklisting the module (/etc/modprobe.d/raspi-blacklist.conf).
At least i2c0 should be left disabled due to the HAT EEPROM and camera.
The bus number has also changed with revisions:
http://www.raspberrypi.org/forums/viewtopic.php?p=603950#p603950
switch the bus between the two destinations as required, although we'd
have to confirm with Broadcom or the RPi Foundation that that would work
with this SoC.
There's certainly no reason to believe that the kernel wouldn't want to
read the HAT EEPROM. After all, it has to identify what's connected there.