Re: [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver

[Alexander Shishkin]

Peter Zijlstra <peterz@xxxxxxxxxxxxx> writes:

> On Tue, Nov 11, 2014 at 01:24:43PM +0200, Alexander Shishkin wrote:
>> Peter Zijlstra <peterz@xxxxxxxxxxxxx> writes:
>
>> > Now I'm not sure we want to export all the bits you're using though.
>> > Like the topa_multiple_entires, that appears an implementation detail
>> > userspace should not really care about either way.
>> 
>> Actually, userspace can make assumptions about lost data from this
>> bit.
>
> Do explain; it feels entirely wrong to expose something like this, esp.
> since this crappy single TOPA thing is going away.

At the very least, it gives you the minimal amount of memory you can ask
for the aux buffer. With multiple entry topa it is one page, with single
entry topa it is two pages. You can leave it up to the userspace to find
out by trial and error, of course.

>> But there are others, such as encoded address length. In future
>> there will also be several "caps" with allowed values for certain bit
>> fields in RTIT_CTL, such as timing packet frequencies.
>
> No, those should not be caps, those should be in the format description.

Format description gives a bit field, within which not all combinations
may be valid. That is,

format/blah_freq: config:16-19
caps/blah_freq: 81

which means that on this cpu you can only set blah_freq to either 0 or
7. Figuring out these things by trial and error from userspace is not
really nice.

Regards,
--
Alex
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