RE: [PATCH 05/13] KVM: Update IRTE according to guest interrupt configuration changes

[Zhang, Yang Z]

Wu, Feng wrote on 2014-11-13:
> 
> 
> Zhang, Yang Z wrote on 2014-11-13:
>> kvm@xxxxxxxxxxxxxxx; iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx;
>> linux-kernel@xxxxxxxxxxxxxxx
>> Subject: RE: [PATCH 05/13] KVM: Update IRTE according to guest
>> interrupt configuration changes
>> 
>> Wu, Feng wrote on 2014-11-13:
>>> 
>>> 
>>> kvm-owner@xxxxxxxxxxxxxxx wrote on 2014-11-12:
>>>> kvm@xxxxxxxxxxxxxxx; iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx;
>>>> linux-kernel@xxxxxxxxxxxxxxx
>>>> Subject: Re: [PATCH 05/13] KVM: Update IRTE according to guest
>>>> interrupt configuration changes
>>>> 
>>>> 
>>>> 
>>>> On 12/11/2014 10:19, Wu, Feng wrote:
>>>>>> You can certainly backport these patches to distros that do not
>>>>>> have VFIO.  But upstream we should work on VFIO first.  VFIO
>>>>>> has feature parity with legacy device assignment, and adding a
>>>>>> new feature that is not in VFIO would be a bad idea.
>>>>>> 
>>>>>> By the way, do you have benchmark results for it?  We have not
>>>>>> been able to see any performance improvement for APICv on e.g.
> netperf.
>>>>> 
>>>>> Do you mean benchmark results for APICv itself or VT-d
> Posted-Interrtups?
>>>> 
>>>> Especially for VT-d posted interrupts---but it'd be great to know
>>>> which workloads see the biggest speedup from APICv.
>>> 
>>> We have some draft performance data internally, please see the
>>> attached. For VT-d PI, I think we can get the biggest performance gain
>>> if the VCPU is running in non-root mode for most of the time (not in
>>> HLT state), since external interrupt from assigned devices will be
>>> delivered by guest directly in this case. That means we can run some
>>> cpu intensive workload in the guests.
>> 
>> Have you check that the CPU side posted interrupt is taking effect
>> in w/o VT-D PI case? Per my understanding, the performance gap
>> should be so large if you use CPU side posted interrupt. This data
>> more like the VT-d PI vs non PI(both VT-d and CPU).
> 
> Yes, this data is VT-d PI vs Non VT-d PI. The CPU side APICv mechanism
> (including CPU side Posted-Interrtups) is enabled.

From the CPU utilization data, it seems the environment of APICv is not reasonable to me. with current APICv, the interrupt should not deliver to the PCPU where vcpu is running. Otherwise, it will force the vcpu vmexit and the CPU side posted interrupt cannot take effect. Do you set the interrupt affinity manually?

> 
> Thanks,
> Feng
> 
>> 
>>> 
>>> Thanks,
>>> Feng
>>> 
>>>> 
>>>> Paolo
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>> 
>> 
>> Best regards,
>> Yang
>>


Best regards,
Yang