On 2014/11/14 9:31, Thomas Gleixner wrote:
On Fri, 14 Nov 2014, Yijing Wang wrote:Hi Thomas,
Could you please use a mail client which does proper line wraps or
configure yours to do so?
Associate the irq domain and PCI bus is not necessary, because allThat's a completely orthogonal problem. From the MSI/interrupt
PCI buses under same host bridge always share same MSI chip/irq
domain, we only need associate them and pci host bridge.
I'm refactoring the pci_host_bridge, make it be a generic one, rip
out of the pci root bus creation, so we could put the irq domain and
pci domain etc.. in it. Finally, we could eliminate lots platform
arch functions. I will post it out within one week.
handling POV it does not matter at all where that information is
stored. All we care about is that it is retrievable via the (pci)
device which tries to setup MSI[X].
So we can store/retrieve it via generic functions into/from whatever
is available right now. If the irq side has generic interfaces to do
so then this wont conflict with your decisions to change the final
storage point because all it takes is to tweak the storage/retrieve
functions.
So all we need at the moment is an agreed on way to store/retrieve
that information which is based on the current shared infrastructure,
aka. Linus tree. If we can utilize that you are completely free to
change the association mechanism underneath.
So we need something like:
struct msi_chip *pci_get_msi_chip(struct pci_dev *);
or:
struct irq_domain *pci_get_msi_domain(struct pci_dev *);
BTW, there's a conflict when merging tip/irq/irqdomain into
tip/x86/apic. It's my first time to deal with merging conflicts,
what's the preferred way? Is it working like this?
1) I merge the two branch
2) I rebase my x86 irqdomain patch sets and send them to you
3) You merge the two branch and apply my patch set.
Regards!
Gerry
Thanks,--
tglx
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