[PATCH V2 14/22] MIPS: BMIPS: Fix L1_CACHE_SHIFT when BMIPS5000 is selected
From: Kevin Cernekee
Date: Sat Nov 15 2014 - 19:22:20 EST
BMIPS platforms can select multiple CPUs, in which case we'll need to
use the greatest common denominator (= 1 << 7 = 128 bytes, for the
BMIPS5000 L2).
Signed-off-by: Kevin Cernekee <cernekee@xxxxxxxxx>
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3d56928..c0130ec 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1473,6 +1473,7 @@ config CPU_BMIPS
select WEAK_ORDERING
select CPU_SUPPORTS_HIGHMEM
select CPU_HAS_PREFETCH
+ select MIPS_L1_CACHE_SHIFT_7
help
Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
--
2.1.1
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