Hi Liu Ying:
I foud Rockchip RK618 (a mfd function device with mipi dsiïlvds
transmitterãHDMI TXãand audio codecïand
controlled by the SOC from i2c ) have the same register layout with your
i.MX MIPI DSIïwhich means RK618 MIPI
DSI also have the Synopsys compatible DSI IPãSo Would you please make
this drives more platform independentï
--
At 2014-12-18 15:11:22, "Liu Ying" <Ying.Liu@xxxxxxxxxxxxx> wrote:
Hi,
This series addressed almost all comments from Thierry Redding and Russell
on v1.
This series adds support for i.MX MIPI DSI DRM driver.
Currently, the MIPI DSI driver only supports the burst with sync pulse mode.
This series also includes a DRM panel driver for the Truly TFT480800-16-E panel
which is driven by the Himax HX8369A driver IC. The driver IC data sheet could
be found at [1]. As mentioned by the data sheet, the driver IC supports several
interface modes. Currently, the DRM panel driver only supports the MIPI DSI video
mode. New interface modes could be added later(perhaps, just like the way the DRM
simple panel driver supports both MIPI DSI interface panels and simple(parallel)
interface panels).
The MIPI DSI feature is tested on i.MX6Q SabreSD board and i.MX6DL SabreSD board.
The MIPI DSI display could be enabled directly on i.MX6Q SabreSD board after
applying this series, because the 26.4MHz pixel clock the panel requires could be
derived from the IPU HSP clock(264MHz) with an integer divider.
On i.MX6DL SabreSD board, we need to manually disable the LVDS and HDMI displays in
the device tree blob, since the i.MX6DL IPU HSP clock is 198MHz at present, which
makes the pixel clock share the PLL5 video clock source with the LVDS and HDMI,
thus, the panel cannot get the pixel clock rate it wants.
Patch 01/15 is needed to get a precise pixel clock rate(26.4MHz) from the PLL5 video
clock. If we don't have this patch, the pixel clock rate is about 20MHz, which
causes a horitonal shift on the display image.
This series can be applied on the drm-next branch.
[1] http://www.allshore.com/pdf/Himax_HX8369-A.pdf
Liu Ying (14):
clk: divider: Correct parent clk round rate if no bestdiv is normally
found
of: Add vendor prefix for Himax Technologies Inc.
of: Add vendor prefix for Truly Semiconductors Limited
ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits
definition
ARM: imx6q: clk: Add the video_27m clock
ARM: dts: imx6qdl: Move existing MIPI DSI ports into a new 'ports'
node
drm/dsi: Add a helper to get bits per pixel of MIPI DSI pixel format
drm: imx: Add MIPI DSI host controller driver
drm: panel: Add support for Himax HX8369A MIPI DSI panel
ARM: dtsi: imx6qdl: Add support for MIPI DSI host controller
ARM: dts: imx6qdl-sabresd: Add support for TRULY TFT480800-16-E MIPI
DSI panel
ARM: imx_v6_v7_defconfig: Cleanup for imx drm being moved out of
staging
ARM: imx_v6_v7_defconfig: Add support for MIPI DSI host controller
ARM: imx_v6_v7_defconfig: Add support for Himax HX8369A panel
.../devicetree/bindings/drm/imx/mipi_dsi.txt | 78 ++
.../devicetree/bindings/panel/himax,hx8369a.txt | 41 +
.../devicetree/bindings/vendor-prefixes.txt | 2 +
arch/arm/boot/dts/imx6q.dtsi | 20 +-
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 20 +
arch/arm/boot/dts/imx6qdl.dtsi | 30 +-
arch/arm/configs/imx_v6_v7_defconfig | 17 +-
arch/arm/mach-imx/clk-imx6q.c | 1 +
drivers/clk/clk-divider.c | 3 +-
drivers/gpu/drm/imx/Kconfig | 6 +
drivers/gpu/drm/imx/Makefile | 1 +
drivers/gpu/drm/imx/imx-mipi-dsi.c | 1056 ++++++++++++++++++++
drivers/gpu/drm/panel/Kconfig | 5 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-himax-hx8369a.c | 573 +++++++++++
include/drm/drm_mipi_dsi.h | 14 +
include/dt-bindings/clock/imx6qdl-clock.h | 3 +-
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
18 files changed, 1844 insertions(+), 28 deletions(-)
create mode 100644 Documentation/devicetree/bindings/drm/imx/mipi_dsi.txt
create mode 100644 Documentation/devicetree/bindings/panel/himax,hx8369a.txt
create mode 100644 drivers/gpu/drm/imx/imx-mipi-dsi.c
create mode 100644 drivers/gpu/drm/panel/panel-himax-hx8369a.c
--
2.1.0
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