Re: [PATCH v5 1/2] i2c: cadence: Handle > 252 byte transfers

From: Harini Katakam
Date: Tue Jan 13 2015 - 12:17:28 EST


Hi,

On Tue, Jan 13, 2015 at 4:58 PM, Wolfram Sang <wsa@xxxxxxxxxxxxx> wrote:
> On Fri, Dec 12, 2014 at 09:48:26AM +0530, Harini Katakam wrote:
>> The I2C controller sends a NACK to the slave when transfer size register
>> reaches zero, irrespective of the hold bit. So, in order to handle transfers
>> greater than 252 bytes, the transfer size register has to be maintained at a
>> value >= 1. This patch implements the same.
>> The interrupt status is cleared at the beginning of the isr instead of
>> the end, to avoid missing any interrupts.
>>
>> Signed-off-by: Harini Katakam <harinik@xxxxxxxxxx>
>
> Applied to for-next, thanks!
>
>> @@ -333,10 +359,11 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id)
>> * receive if it is less than transfer size and transfer size if
>> * it is more. Enable the interrupts.
>> */
>> - if (id->recv_count > CDNS_I2C_TRANSFER_SIZE)
>> + if (id->recv_count > CDNS_I2C_TRANSFER_SIZE) {
>> cdns_i2c_writereg(CDNS_I2C_TRANSFER_SIZE,
>> CDNS_I2C_XFER_SIZE_OFFSET);
>> - else
>> + id->curr_recv_count = CDNS_I2C_TRANSFER_SIZE;
>> + } else
>> cdns_i2c_writereg(id->recv_count, CDNS_I2C_XFER_SIZE_OFFSET);
>
> else branch must have braces, too! I fixed that.

Thanks!

Regards,
Harini
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