Re: [PATCH v2 0/12] Those patches is used for dw_hdmi audio support

[Yang Kuankuan]

On 01/31/2015 07:00 AM, Russell King - ARM Linux wrote:
> On Fri, Jan 30, 2015 at 06:23:51AM -0500, Yakir Yang wrote:
> > We found Designware hdmi driver only support audio clock config, we can not play sound through it.
> > To add Designware HDMI Audio support, we make those patch set:
> >   1): modify n/cts config order, according to dw_hdmi document.
> >   2): add Audio Sample Channel Status config interfaces to dw_hdmi driver.
> >   3): add audio support for more display resolutions(eg. 800x600).
> >   4): add audio support for No-CEA display resolutions.
> >   5): fixed dw_hdmi irq bug, add irq control to suspend/resume interfaces.
> >   6): add suspend/resume callback for dw_hdmi rockchip driver.
> >   7): filter interlace mode in rockchip vop driver.
> >   8): add hdmi audio config interfaces to dw_hdmi driver.
> >   9): creat "dw_hdmi-audio" platform device in dw_hdmi driver.
> > 10): add codec driver for hdmi audio, callback dw_hdmi audio config functions.
> > 11): add sound driver for hdmi audio, creat hdmi audio sound card.
> > 12): add dt-bings file and add hdmi_audio node to corresponding dt file.
> I think the overall issue with this patch is working out how to support
> both the iMX6 version of this IP, and the Rockchip version of the IP.
>
> These two hardware IPs seem to be configured at synthesis time with
> entirely different audio architectures, which change which registers
> are available, and sometimes which bits in the registers are present,
> which makes it more difficult to come up with a unified audio driver.
>
> Also, I think that it would be a good idea to start documenting which
> registers are available in which versions of the IP in dw_hdmi.h,
> otherwise I can see that it's going to be very easy for someone to
> assume that some register or bit which is available in one IP is
> present on all.
>
> The CONFIGx_ID register values for the iMX6 SoC are:
>
> 	CONFIG0_ID 0x8f
> 	CONFIG1_ID 0x01
> 	CONFIG2_ID 0xf2
> 	CONFIG3_ID 0x02
>
> CONFIG0_ID appears to contain bits which indicate whether the IP
> supports I2S and SPDIF mode.  Presumably your IP has bit 4 set for I2S,
> and maybe bit 5 for SPDIF?
>
> CONFIG1_ID bit 0 indicates whether the AHB interface is present, which
> is presumably zero for your IP?
>
> CONFIG3_ID bit 0 indicates whether "generic parallel audio, GPAUD" is
> present.
>
> Could you provide (in addition to the values printed in the message I
> requested in another reply) the values of the CONFIGx_ID registers
> please, and whether any of the bits in there are documented as being
> applicable to audio.
>
> Thanks.
The IP version on rk3288 : dwhdmi-rockchip ff980000.hdmi: Detected HDMI 
controller 0x20:0xa:0xa0:0xc1

The CONFIGx_ID register values for the rk3288 soc are:
    CONFIG0_ID    0xbf
    CONFIG1_ID    0x22
    CONFIG2_ID    0xc2
    CONFIG3_ID    0x0

After looking at iMX6 DQRM, i found only CONFIG1_ID  & CONFIG3_ID are 
different.

CONFIG1_ID bit 5 indicates whether the HDMI2.0 is present. Bit 1 
indicates whether
configuration interface is APB interface.

CONFIG3_ID bit 3 indicates whether the AHBAUDDMA is present. Bit 1 
indicates whether
Generic Parallel Audio is present.


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