Re: [PATCH v4 6/6] KVM: nVMX: Enable nested posted interrupt processing

[Wincy Van]

On Tue, Feb 3, 2015 at 9:21 AM, Zhang, Yang Z <yang.z.zhang@xxxxxxxxx> wrote:
> Paolo Bonzini wrote on 2015-02-03:
>>
>>
>> On 02/02/2015 16:33, Wincy Van wrote:
>>> static void vmx_accomp_nested_posted_intr(struct kvm_vcpu *vcpu) {
>>>         struct vcpu_vmx *vmx = to_vmx(vcpu);
>>>
>>>         if (is_guest_mode(vcpu) &&
>>>             vmx->nested.posted_intr_nv != -1 &&
>>>             pi_test_on(vmx->nested.pi_desc))
>>>                 kvm_apic_set_irr(vcpu,
>>>                         vmx->nested.posted_intr_nv); }
>>> Then we will get an nested-vmexit in vmx_check_nested_events, that
>>> posted intr will be handled by L1 immediately.
>>> This mechanism will also emulate the hardware's behavior: If a
>>> posted intr was not accomplished by hardware, we will get an
>
> Actually, we cannot say "not accomplished by hardware". It more like we don't do the job well. See my below answer.
>

Yes, exactly.

>>> interrupt with POSTED_INTR_NV.
>>
>> Yes.
>
> This is not enough. From L1's point, L2 is in vmx non-root mode. So we should emulate the posted interrupt in L0 correctly, say:
> 1. clear ON bit
> 2. ack interrupt
> 3, syn pir to virr
> 4. update RVI.
> Then let the hardware(virtual interrupt delivery) to accomplish interrupt injection.
>
> Force a vmexit more like a trick. It's better to follow the hardware's behavior unless we cannot do it.
>

Yes, I will try again to do this.


Thanks,
Wincy
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