[PATCH v4 0/5] powerpc8xx: Further optimisation of TLB handling

[Christophe Leroy]

This patchset provides a further optimisation of TLB handling in the 8xx.
Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE

Patchset:
01 - powerpc/8xx: macro for handling CPU15 errata
02 - powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
03 - powerpc/8xx: dont save CR in SCRATCH registers
04 - powerpc/8xx: Use SPRG2 instead of DAR for saving r3
05 - powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000

All changes have been successfully tested on MPC885

Signed-off-by: Christophe Leroy <christophe.leroy@xxxxxx>
Tested-by: Christophe Leroy <christophe.leroy@xxxxxx>

---
v3: 01-06 no change ; 07-11 changed
v4: 01-06 removed (already in scootwood.git next) ; 07-11 renamed 01-05 and respined against scootwood.git next

 arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++---------------
 1 file changed, 51 insertions(+), 28 deletions(-)
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