Re: [PATCH 1/3] perf, x86: Add new cache events table for Haswell
From: Peter Zijlstra
Date: Thu Feb 12 2015 - 16:28:18 EST
On Tue, Feb 10, 2015 at 04:40:22PM -0800, Andi Kleen wrote:
> diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> index 498b6d9..02ab31d 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> @@ -415,6 +415,199 @@ static __initconst const u64 snb_hw_cache_event_ids
>
> };
>
> +/*
> + * Notes on the events:
> + * - data reads do not include code reads (comparable to earlier tables)
> + * - data counts include speculative execution (except L1 write, dtlb, bpu)
> + * - remote node access includes remote memory, remote cache, remote mmio.
> + * - prefetches are not included in the counts because they are not
> + * reliably counted.
> + * The events with additional caveats have references to the specification update.
> + */
> +
> +#define HSW_DEMAND_DATA_RD BIT_ULL(0)
> +#define HSW_DEMAND_RFO BIT_ULL(1)
> +#define HSW_ANY_RESPONSE BIT_ULL(16)
> +#define HSW_SUPPLIER_NONE BIT_ULL(17)
> +#define HSW_L3_MISS_LOCAL_DRAM BIT_ULL(22)
> +#define HSW_L3_MISS_REMOTE_HOP0 BIT_ULL(27)
> +#define HSW_L3_MISS_REMOTE_HOP1 BIT_ULL(28)
> +#define HSW_L3_MISS_REMOTE_HOP2P BIT_ULL(29)
> +#define HSW_L3_MISS (HSW_L3_MISS_LOCAL_DRAM| \
> + HSW_L3_MISS_REMOTE_HOP0|HSW_L3_MISS_REMOTE_HOP1| \
> + HSW_L3_MISS_REMOTE_HOP2P)
> +#define HSW_SNOOP_NONE BIT_ULL(31)
> +#define HSW_SNOOP_NOT_NEEDED BIT_ULL(32)
> +#define HSW_SNOOP_MISS BIT_ULL(33)
> +#define HSW_SNOOP_HIT_NO_FWD BIT_ULL(34)
> +#define HSW_SNOOP_HIT_WITH_FWD BIT_ULL(35)
> +#define HSW_SNOOP_HITM BIT_ULL(36)
> +#define HSW_SNOOP_NON_DRAM BIT_ULL(37)
> +#define HSW_ANY_SNOOP (HSW_SNOOP_NONE| \
> + HSW_SNOOP_NOT_NEEDED|HSW_SNOOP_MISS| \
> + HSW_SNOOP_HIT_NO_FWD|HSW_SNOOP_HIT_WITH_FWD| \
> + HSW_SNOOP_HITM|HSW_SNOOP_NON_DRAM)
> +#define HSW_DEMAND_READ HSW_DEMAND_DATA_RD
> +#define HSW_DEMAND_WRITE HSW_DEMAND_RFO
> +#define HSW_L3_MISS_REMOTE (HSW_L3_MISS_REMOTE_HOP0|\
> + HSW_L3_MISS_REMOTE_HOP1|HSW_L3_MISS_REMOTE_HOP2P)
> +
> +static __initconst const u64 hsw_hw_cache_extra_regs
> + [PERF_COUNT_HW_CACHE_MAX]
> + [PERF_COUNT_HW_CACHE_OP_MAX]
> + [PERF_COUNT_HW_CACHE_RESULT_MAX] =
> +{
> + [ C(LL ) ] = {
> + [ C(OP_READ) ] = {
> + [ C(RESULT_ACCESS) ] = HSW_DEMAND_READ|
> + HSW_ANY_RESPONSE|HSW_ANY_SNOOP|
> + HSW_SUPPLIER_NONE,
> + [ C(RESULT_MISS) ] = HSW_DEMAND_READ|
> + HSW_L3_MISS|HSW_ANY_SNOOP|
> + HSW_SUPPLIER_NONE,
OK, sorry for going on about this, I'm trying to understand a few things:
1) SDM (2014-09) says in 18.9.5 (snb offcore):
"software must set at least one request type bit and a valid response
type pattern"
and
"A valid response type must be a non-zero value of the following
expression:
ANY | [('OR' of Supplier Info Bits) & ('OR' of Snoop Info Bits)]"
Is this still valid for the HSW part?
Assuming so, it appears to me that:
#define HSW_LLC_ACCESS (HSW_ANY_RESPONSE)
#define HSW_LLC_MISS (HSW_L3_MISS|HSW_ANY_SNOOP)
Would be the suitable helpers to use here. No need to set Supplier and
Snoop bits for ANY_RESPONSE.
2) I know I included it on SNB, but would SNOOP_HITM really be a miss?
>From what I can tell it could be a local MtoS w/ WB or so. Do we count
it as a miss because the WB part goes to DRAM so we still get to wait
for it (just in the 'wrong' direction)?
3) While we're there, will we get SNOOP_FWD only for Clean forwards or
also for the HITM forwards; the SDM is vague -- it would be nice if
SNOOP_FWD was a selector for all remote socket snoops.
> + [ C(NODE) ] = {
> + [ C(OP_READ) ] = {
> + [ C(RESULT_ACCESS) ] = HSW_DEMAND_READ|
> + HSW_L3_MISS_LOCAL_DRAM|HSW_SUPPLIER_NONE|
> + HSW_ANY_SNOOP,
4) SUPPLIER_NONE; I'll interpret it as specific event that lacks other
supplier info (as opposed to _any_ supplier). What kind of events would
this be?
I didn't include SUPPLIER_NONE in any events on SNB, its implied by
L3_ACCESS due to ANY, but other than that I'm not sure what to do with
it. It seems out of place for DRAM_ANY.
5) NODE-ACCESS is _any_ DRAM;
NODE-MISS is remote DRAM.
for SNB I didn't include NON_DRAM in ANY_SNOOP for this reason.
#define HSW_DRAM_ANY (HSW_LLC_MISS & ~HSW_SNOOP_NON_DRAM)
#define HSW_DRAM_REMOTE (HSW_MISS_LOCAL_DRAM|HSW_ANY_SNOOP & ~HSW_SNOOP_NON_DRAM)
6) Should we maybe use
(SNOOP_ANY & ~(SNOOP_HIT_NO_FWD|NON_DRAM))
instead for DRAM_REMOTE? SNOOP_HIT_NO_FWD seem as inappropriate as
NON_DRAM for REMOTE.
The SNB patch would look something like so I suppose..
---
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 498b6d967138..d2030868444c 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -225,6 +225,21 @@ static u64 intel_pmu_event_map(int hw_event)
return intel_perfmon_event_map[hw_event];
}
+
+/*
+ * SDM (2014-09) says in 18.9.5 (snb offcore):
+ *
+ * "software must set at least one request type bit and a valid response type
+ * pattern"
+ *
+ * and
+ *
+ * "A valid response type must be a non-zero value of the following expression:
+ *
+ * ANY | [('OR' of Supplier Info Bits) & ('OR' of Snoop Info Bits)]"
+ */
+
+/* Request */
#define SNB_DMND_DATA_RD (1ULL << 0)
#define SNB_DMND_RFO (1ULL << 1)
#define SNB_DMND_IFETCH (1ULL << 2)
@@ -238,7 +253,10 @@ static u64 intel_pmu_event_map(int hw_event)
#define SNB_BUS_LOCKS (1ULL << 10)
#define SNB_STRM_ST (1ULL << 11)
#define SNB_OTHER (1ULL << 15)
+
#define SNB_RESP_ANY (1ULL << 16)
+
+/* Supplier */
#define SNB_NO_SUPP (1ULL << 17)
#define SNB_LLC_HITM (1ULL << 18)
#define SNB_LLC_HITE (1ULL << 19)
@@ -246,6 +264,8 @@ static u64 intel_pmu_event_map(int hw_event)
#define SNB_LLC_HITF (1ULL << 21)
#define SNB_LOCAL (1ULL << 22)
#define SNB_REMOTE (0xffULL << 23)
+
+/* Snoop */
#define SNB_SNP_NONE (1ULL << 31)
#define SNB_SNP_NOT_NEEDED (1ULL << 32)
#define SNB_SNP_MISS (1ULL << 33)
@@ -258,12 +278,12 @@ static u64 intel_pmu_event_map(int hw_event)
#define SNB_DMND_WRITE (SNB_DMND_RFO|SNB_LLC_RFO)
#define SNB_DMND_PREFETCH (SNB_PF_DATA_RD|SNB_PF_RFO)
-#define SNB_SNP_ANY (SNB_SNP_NONE|SNB_SNP_NOT_NEEDED| \
- SNB_SNP_MISS|SNB_NO_FWD|SNB_SNP_FWD| \
- SNB_HITM)
+#define SNB_NO_SNP (SNB_SNP_NONE|SNB_SNP_NOT_NEEDED|SNB_SNP_MISS)
+#define SNB_REMOTE_SNP (SNB_NO_SNP|SNB_SNP_FWD|SNB_HITM)
+#define SNB_ANY_SNP (SNB_REMOTE_SNP|SNB_NO_FWD)
-#define SNB_DRAM_ANY (SNB_LOCAL|SNB_REMOTE|SNB_SNP_ANY)
-#define SNB_DRAM_REMOTE (SNB_REMOTE|SNB_SNP_ANY)
+#define SNB_DRAM_ANY (SNB_LOCAL|SNB_REMOTE|SNB_ANY_SNP)
+#define SNB_DRAM_REMOTE (SNB_REMOTE|SNB_REMOTE_SNP)
#define SNB_L3_ACCESS SNB_RESP_ANY
#define SNB_L3_MISS (SNB_DRAM_ANY|SNB_NON_DRAM)
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