Re: [RFC PATCH] x86, fpu: Use eagerfpu by default on all CPUs

[Rik van Riel]

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On 02/23/2015 04:17 PM, Maciej W. Rozycki wrote:
> On Sat, 21 Feb 2015, Andy Lutomirski wrote:
> 
>>> Additionally I believe long-executing FPU instructions (i.e. 
>>> transcendentals) can take advantage of continuing to execute in
>>> parallel where the context has already been switched rather
>>> than stalling an eager FPU context switch until the FPU
>>> instruction has completed.
>> 
>> It seems highly unlikely to me that a slow FPU instruction can
>> retire *after* a subsequent fxsave, which would need to happen
>> for this to work.
> 
> I meant something else -- a slow FPU instruction can retire after a
> task has been switched where the FP context has been left intact,
> i.e. in the lazy FP context switching case, where only the MMU
> context and GPRs have been replaced.

I don't think that's true, because changing the MMU context and GPRs
also includes changing the instruction pointer, and changing over the
execution to the new task.

After a context switch, the instructions from the old task are no
longer in the pipeline.

- -- 
All rights reversed
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