Sandy Bridge Xeon and Extreme chips have integrated memoryI think the current approach of issuing warnings here and in the driver on load
controllers with (rather limited) onboard SMBUS masters. This
driver gives access to the bus.
There are various groups working on standardizing a way to arbitrate
access to the bus between the OS, SMM firmware, a BMC, hardware
thermal control, etc. In the mean time, running this driver is
unsafe except under special circumstances. Nonetheless, this driver
has real users.
As a compromise, the driver will refuse to load unless
i2c_imc.allow_unsafe_access=Y. When safe access becomes available,
we can leave this option as a way for legacy users to run the
driver, and we'll allow the driver to load by default if safe bus
access is available.
Signed-off-by: Andy Lutomirski <luto@xxxxxxxxxxxxxx>
---
drivers/i2c/busses/Kconfig | 17 ++
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-imc.c | 567 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 585 insertions(+)
create mode 100644 drivers/i2c/busses/i2c-imc.c
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index ab838d9e28b6..50e3d79122dd 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -149,6 +149,23 @@ config I2C_ISMT
This driver can also be built as a module. If so, the module will be
called i2c-ismt.
+config I2C_IMC
+ tristate "Intel iMC (LGA 2011) SMBus Controller"
+ depends on PCI && X86
+ help
+ If you say yes to this option, support will be included for the Intel
+ Integrated Memory Controller SMBus host controller interface. This
+ controller is found on LGA 2011 Xeons and Core i7 Extremes.
+
+ There are currently no systems on which the kernel knows that it can
+ safely enable this driver. For now, you need to pass this driver a
+ scary module parameter, and you should only pass that parameter if you
+ have a special motherboard and know exactly what you are doing.
+ Special motherboards include the Supermicro X9DRH-iF-NV.
+