Re: [PATCH 3/5] clk: mediatek: Add basic clocks for Mediatek MT8135.
From: Sascha Hauer
Date: Tue Mar 17 2015 - 05:57:18 EST
On Mon, Mar 16, 2015 at 08:03:39AM +0100, Uwe Kleine-König wrote:
> Hello Sascha,
>
> On Mon, Mar 16, 2015 at 06:55:09AM +0100, Sascha Hauer wrote:
> > +static const char *axi_parents[] __initconst = {
> > + "clk26m",
> > + "syspll_d3",
> > + "syspll_d4",
> > + "syspll_d6",
> > + "univpll_d5",
> > + "univpll2_d2",
> > + "syspll_d3p5"
> > +};
> __initconst should only be used for const data, but this array isn't
> const. Only the strings the pointer in this array point to are constant.
That may be true, but the way it's currently done compiles through
without warnings with CONFIG_DEBUG_SECTION_MISMATCH enabled.
>
> So you have to use either
>
> static const char *axi_parents[] __initdata = {
This results in:
drivers/clk/mediatek/clk-mt8173.c:515:20: error: i2s3_b_ck_parents causes a section type conflict with infra_clks
static const char *i2s3_b_ck_parents[] __initdata = {
which can be avoided with static const char * const axi_parents[] __initdata
>
> or
>
> static const char * const axi_parents[] __initconst = {
Which results in:
drivers/clk/mediatek/clk-mt8173.c:568:2: warning: initialization discards 'const' qualifier from pointer target type
MUX_GATE(TOP_HDCP_24M_SEL, "hdcp_24m_sel", hdcp_24m_parents, 0x00d0, 16, 2, 23),
With the following patch this can also be resolved. Until this is merged
(or I have the OK from Mike to add this in front of this series) I
prefer to keep it like it is at the moment.
(BTW I compile tested this with ARM multi_v7_defconfig, no additional
warnings are introduced with this patch)
Sascha
-------------------------------8<-----------------------------------