Re: [PATCH 2/3] clk: ti: Implement FAPLL set_rate for the synthesizer

[Tony Lindgren]

* Tero Kristo <t-kristo@xxxxxx> [150323 06:25]:
> On 03/23/2015 12:35 AM, Tony Lindgren wrote:
> >+static u32 ti_fapll_synth_set_frac_rate(struct fapll_synth *synth,
> >+					unsigned long rate,
> >+					unsigned long parent_rate)
> >+{
> >+	u32 post_div_m, synth_int_div, synth_frac_div, v;
> >+
> >+	post_div_m = DIV_ROUND_UP_ULL((u64)parent_rate * SYNTH_PHASE_K, rate);
> >+	post_div_m = post_div_m / SYNTH_MAX_INT_DIV;
> >+	if (post_div_m > SYNTH_MAX_DIV_M)
> >+		return -EINVAL;
> >+	if (!post_div_m)
> >+		post_div_m = 1;
> >+
> >+	for (; post_div_m < SYNTH_MAX_DIV_M; post_div_m++) {
> >+		synth_int_div = DIV_ROUND_UP_ULL((u64)parent_rate *
> >+						 SYNTH_PHASE_K *
> >+						 10000000,
> >+						 rate * post_div_m);
> >+		synth_frac_div = synth_int_div % 10000000;
> >+		synth_int_div /= 10000000;
> >+
> >+		if (synth_int_div <= SYNTH_MAX_INT_DIV)
> >+			break;
> >+	}
> >+
> >+	if (synth_int_div > SYNTH_MAX_INT_DIV)
> >+		return -EINVAL;
> >+
> >+	v = readl_relaxed(synth->freq);
> >+	v &= ~0x1fffffff;
> >+	v |= (synth_int_div & SYNTH_MAX_INT_DIV) << 24;
> >+	v |= (synth_frac_div & 0xffffff);
> 
> This code is generating these compile time warnings for me:
> 
>   CC      drivers/clk/ti/fapll.o
> drivers/clk/ti/fapll.c: In function âti_fapll_synth_set_rateâ:
> drivers/clk/ti/fapll.c:394:5: warning: âsynth_int_divâ may be used
> uninitialized in this function [-Wuninitialized]
> drivers/clk/ti/fapll.c:373:18: note: âsynth_int_divâ was declared here
> drivers/clk/ti/fapll.c:400:23: warning: âsynth_frac_divâ may be used
> uninitialized in this function [-Wuninitialized]
> drivers/clk/ti/fapll.c:373:33: note: âsynth_frac_divâ was declared here

Oops thanks will check. I did move this into a separate function
to make it more readable, probably happened at that point.

Regards,

Tony
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