Re: [PATCH] clocksource: tegra: Maintain CPU endianness

[Daniel Lezcano]

On 03/18/2015 04:44 PM, Dmitry Osipenko wrote:
> Support big-endian kernel by using endian-aware register access functions.
>
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>

Stephen, Thierry ?

Do you ack it ?

Thanks
  -- Daniel

> ---
>   drivers/clocksource/tegra20_timer.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
> index d2616ef..d8a3a4e 100644
> --- a/drivers/clocksource/tegra20_timer.c
> +++ b/drivers/clocksource/tegra20_timer.c
> @@ -57,9 +57,9 @@ static u64 persistent_ms, last_persistent_ms;
>   static struct delay_timer tegra_delay_timer;
>
>   #define timer_writel(value, reg) \
> -	__raw_writel(value, timer_reg_base + (reg))
> +	writel_relaxed(value, timer_reg_base + (reg))
>   #define timer_readl(reg) \
> -	__raw_readl(timer_reg_base + (reg))
> +	readl_relaxed(timer_reg_base + (reg))
>
>   static int tegra_timer_set_next_event(unsigned long cycles,
>   					 struct clock_event_device *evt)


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