Re: d63e2e1f3df breaks sparc/T5-8

[David Miller]

From: Yinghai Lu <yinghai@xxxxxxxxxx>
Date: Fri, 27 Mar 2015 14:01:54 -0700

> On Thu, Mar 26, 2015 at 4:27 PM, David Ahern <david.ahern@xxxxxxxxxx> wrote:
>> On 3/26/15 2:43 PM, Yinghai Lu wrote:
>>>
>>> Can you send out boot log with "debug ignore_loglevel"?
>>
>>
>> attached
> 
> So the kernel config is sparc32 or sparc64 ?
> 
> pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address
> 0x110204000)
> 
> 
> only could happen when dma_addr_t is 32bit.

All DMA occurs behind an IOMMU and these IOMMUs only
support 32-bit addressing, therefore dma_addr_t is
32-bit on sparc64.

If you want to represent PCI address in some way, you
absolutely cannot use dma_addr_t as your data type.
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