Re: [PATCH 1/1] mfd: lpc_ich: sort IDs

From: Lee Jones
Date: Mon Mar 30 2015 - 07:07:07 EST

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In reply to: Andy Shevchenko: "Re: [PATCH 1/1] mfd: lpc_ich: sort IDs"
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On Mon, 30 Mar 2015, Andy Shevchenko wrote:

> On Mon, 2015-03-30 at 08:06 +0100, Lee Jones wrote:
> > On Fri, 27 Mar 2015, Andy Shevchenko wrote:
> >
> > > This patch just sorts IDs in the table for better maintenance. There is no
> > > functional change.
> > >
> > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> > > ---
> > > drivers/mfd/lpc_ich.c | 172 +++++++++++++++++++++++++-------------------------
> > > 1 file changed, 86 insertions(+), 86 deletions(-)
> >
> > Applied, thanks.
>
> Hmmâ I hope you took v2 of this patch? If not, I might send a fixup if
> it suits your work flow.

I took this one. Please send a follow-up patch.

> > > diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
> > > index f35d428..8bd370a 100644
> > > --- a/drivers/mfd/lpc_ich.c
> > > +++ b/drivers/mfd/lpc_ich.c
> > > @@ -539,6 +539,79 @@ static struct lpc_ich_info lpc_chipset_info[] = {
> > > * functions that probably will be registered by other drivers.
> > > */
> > > static const struct pci_device_id lpc_ich_ids[] = {
> > > + { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL},
> > > + { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD},
> > > + { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM},
> > > + { PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT},
> > > + { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG},
> > > + { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG},
> > > + { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT},
> > > + { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN},
> > > + { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN},
> > > + { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN},
> > > + { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN},
> > > + { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
> > > + { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
> > > + { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO},
> > > { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH},
> > > { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},
> > > { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},
> > > @@ -605,72 +678,6 @@ static const struct pci_device_id lpc_ich_ids[] = {
> > > { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},
> > > { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},
> > > { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},
> > > - { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD},
> > > - { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM},
> > > - { PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT},
> > > - { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG},
> > > - { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG},
> > > - { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
> > > - { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT},
> > > - { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT},
> > > { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT},
> > > { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT},
> > > { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT},
> > > @@ -703,14 +710,11 @@ static const struct pci_device_id lpc_ich_ids[] = {
> > > { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT},
> > > { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT},
> > > { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT},
> > > - { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
> > > + { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
> > > + { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
> > > + { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
> > > + { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
> > > { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG},
> > > { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG},
> > > { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG},
> > > @@ -743,12 +747,14 @@ static const struct pci_device_id lpc_ich_ids[] = {
> > > { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG},
> > > { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG},
> > > { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG},
> > > - { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN},
> > > - { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN},
> > > - { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN},
> > > - { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN},
> > > - { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL},
> > > - { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO},
> > > + { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
> > > + { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
> > > { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP},
> > > { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP},
> > > { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP},
> > > @@ -756,12 +762,6 @@ static const struct pci_device_id lpc_ich_ids[] = {
> > > { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP},
> > > { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP},
> > > { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP},
> > > - { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
> > > - { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
> > > - { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
> > > - { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
> > > - { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
> > > - { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
> > > { 0, }, /* End of list */
> > > };
> > > MODULE_DEVICE_TABLE(pci, lpc_ich_ids);
> >
>
>

--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org â Open source software for ARM SoCs
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Next message: Maninder Singh: "restart_syscall: use freezable blocking call"
Previous message: Peter Zijlstra: "Re: [PATCH V2] sched: Improve load balancing in the presence of idle CPUs"
In reply to: Andy Shevchenko: "Re: [PATCH 1/1] mfd: lpc_ich: sort IDs"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]