Re: [PATCH 7/9] x86/asm/entry/32: tidy up some instructions

[Brian Gerst]

On Tue, Mar 31, 2015 at 1:00 PM, Denys Vlasenko <dvlasenk@xxxxxxxxxx> wrote:
> After TESTs, use logically correct JZ mnemonic instead of JE
> (this doesn't change code).
>
> Tidy up CMPW insns:
>
> Modern CPUs are not good with 16-bit operations.
> The instructions with 16-bit immediates are especially bad,
> on many CPUs they cause length changing prefix stall
> in the decoders, costing ~6 cycles to recover.
>
> Replace CMPWs with CMPLs.
> Of these, for form with 8-bit sign-extended immediates
> it is a win because they are smaller now
> (no 0x66 prefix anymore);
> ones with 16-bit immediates are faster.
>
> @@ -708,7 +708,7 @@ END(sysenter_badsys)
>  #ifdef CONFIG_X86_ESPFIX32
>         movl %ss, %eax
>         /* see if on espfix stack */
> -       cmpw $__ESPFIX_SS, %ax
> +       cmpl $__ESPFIX_SS, %eax
>         jne 27f
>         movl $__KERNEL_DS, %eax
>         movl %eax, %ds

This is incorrect.  32-bit reads from a segment register are not
zero-extended.  The upper 16 bits are implementation-defined.  Most
processors will clear them but it's not guaranteed.

--
Brian Gerst
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/