Re: [PATCH] x86, aperture: Check for GART before accessing GART registers

From: Borislav Petkov
Date: Thu Apr 02 2015 - 13:19:16 EST

On Thu, Apr 02, 2015 at 12:04:21PM -0500, Aravind Gopalakrishnan wrote:
> >No need - I can amend the local copy I have here.

Here's what I did:

From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@xxxxxxx>
Date: Wed, 1 Apr 2015 09:32:08 -0500
Subject: [PATCH] x86/gart: Check for GART support before accessing GART
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GART registers are not present in newer AMD processors (Fam15h,
Model 10h and later). So, avoid accesses to GART registers in PCI
config space by returning early in early_gart_iommu_check() and
gart_iommu_hole_init() if GART is not available.

Current code doesn't break on existing processors but there are some
side effects:

We get bogus AGP aperture messages which are simply noise on
GART-less processors:

AGP: Node 0: aperture [bus addr 0x00000000-0x01ffffff] (32MB)
AGP: Your BIOS doesn't leave a aperture memory hole
AGP: Please enable the IOMMU option in the BIOS setup
AGP: This costs you 64MB of RAM
AGP: Mapping aperture over RAM [mem 0xd4000000-0xd7ffffff]

We can avoid calling allocate_aperture() and would not have to
wastefully reserve 64MB of RAM with memblock_reserve(). Also, we can
avoid having to loop through all PCI buses and devices twice, searching
for a non-existent AGP bridge if we bail out early.

Refactor the family check used in amd_nb into an inline function so we
can use it here as well as in amd_nb.c.

Tested the patch on Fam10h and Fam15h Model 00h-fh and this code runs
fine. On Fam15h, Models 60h-6fh and on Fam16h, we bail out early as they
don't have a GART.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@xxxxxxx>
Reviewed-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@xxxxxxx>
Cc: JÃrg RÃdel <joro@xxxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: Ingo Molnar <mingo@xxxxxxxxxx>
Cc: H. Peter Anvin <hpa@xxxxxxxxx>
Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
Cc: x86-ml <x86@xxxxxxxxxx>
arch/x86/include/asm/amd_nb.h | 11 +++++++++++
arch/x86/kernel/amd_nb.c | 4 +---
arch/x86/kernel/aperture_64.c | 4 ++--
3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index aaac3b2fb746..864c8bd8cbe4 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -98,11 +98,22 @@ static inline u16 amd_get_node_id(struct pci_dev *pdev)
return 0;

+static inline bool amd_gart_present(void)
+ /* GART present only on Fam15h upto model 0fh */
+ if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
+ (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10))
+ return true;
+ return false;

#define amd_nb_num(x) 0
#define amd_nb_has_feature(x) false
#define node_to_amd_nb(x) NULL
+#define amd_gart_present(x) false


diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 5caed1dd7ccf..29fa475ec518 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -89,9 +89,7 @@ int amd_cache_northbridges(void)
next_northbridge(link, amd_nb_link_ids);

- /* GART present only on Fam15h upto model 0fh */
- if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
- (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10))
+ if (amd_gart_present())
amd_northbridges.flags |= AMD_NB_GART;

diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 76164e173a24..1cb170b06853 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -262,7 +262,7 @@ void __init early_gart_iommu_check(void)
u64 aper_base = 0, last_aper_base = 0;
int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0;

- if (!early_pci_allowed())
+ if (!early_pci_allowed() || !amd_gart_present())

/* This is mostly duplicate of iommu_hole_init */
@@ -356,7 +356,7 @@ int __init gart_iommu_hole_init(void)
int i, node;

if (gart_iommu_aperture_disabled || !fix_aperture ||
- !early_pci_allowed())
+ !early_pci_allowed() || !amd_gart_present())
return -ENODEV;

pr_info("Checking aperture...\n");


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