[PATCH] x86: Pack loops tightly as well

[Ingo Molnar]

* Ingo Molnar <mingo@xxxxxxxxxx> wrote:

> > I realize that x86 CPU manufacturers recommend 16-byte jump target 
> > alignments (it's in the Intel optimization manual), but the cost 
> > of that is very significant:
> > 
> >         text           data       bss         dec      filename
> >     12566391        1617840   1089536    15273767      vmlinux.align.16-byte
> >     12224951        1617840   1089536    14932327      vmlinux.align.1-byte
> > 
> > By using 1 byte jump target alignment (i.e. no alignment at all) 
> > we get an almost 3% reduction in kernel size (!) - and a probably 
> > similar reduction in I$ footprint.
> 
> Likewise we could pack functions tightly as well via the patch 
> below:
> 
>      text	   data	    bss	     dec	 filename
>  12566391	1617840	1089536	15273767	 vmlinux.align.16-byte
>  12224951	1617840	1089536	14932327	 vmlinux.align.1-byte
>  11976567	1617840	1089536	14683943	 vmlinux.align.1-byte.funcs-1-byte
> 
> Which brings another 2% reduction in the kernel's code size.
> 
> It would be interesting to see some benchmarks with these two 
> patches applied. Only lightly tested.

And the final patch below also packs loops tightly:

     text        data    bss     dec              filename
 12566391        1617840 1089536 15273767         vmlinux.align.16-byte
 12224951        1617840 1089536 14932327         vmlinux.align.1-byte
 11976567        1617840 1089536 14683943         vmlinux.align.1-byte.funcs-1-byte
 11903735        1617840 1089536 14611111         vmlinux.align.1-byte.funcs-1-byte.loops-1-byte

The total reduction is 5.5%.

Now loop alignment is beneficial if:

 - a loop is cache-hot and its surroundings are not.

Loop alignment is harmful if:

 - a loop is cache-cold
 - a loop's surroundings are cache-hot as well
 - two cache-hot loops are close to each other

and I'd argue that the latter three harmful scenarios are much more 
common in the kernel. Similar arguments can be made for function 
alignment as well. (Jump target alignment is a bit different but I 
think the same conclusion holds.)

(I might have missed some CPU microarchitectural details though that 
would make such packing undesirable.)

Thanks,

	Ingo

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