Re: [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold

[Peter Zijlstra]

On Wed, Apr 15, 2015 at 06:35:48PM +0000, Liang, Kan wrote:
> 
> > 
> > On Thu, Apr 09, 2015 at 12:37:43PM -0400, Kan Liang wrote:
> > > @@ -280,8 +280,9 @@ static int alloc_pebs_buffer(int cpu)
> > >  	ds->pebs_absolute_maximum = ds->pebs_buffer_base +
> > >  		max * x86_pmu.pebs_record_size;
> > >
> > > -	ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
> > > -		thresh * x86_pmu.pebs_record_size;
> > > +	if (x86_pmu.intel_cap.pebs_format < 1)
> > > +		ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
> > > +			x86_pmu.pebs_record_size;
> > >
> > >  	return 0;
> > >  }
> > 
> > I can't seem to figure out what this is about.. help?
> 
> We move AUTO_RELOAD and large PEBS check to intel_pmu_hw_config.
> But for earlier platform, it calls x86_pmu_hw_config.
> So we force single PEBS record for old platform.

We're talking about intel_pmu vs core_pmu right? I don't think core_pmu
supports PEBS at all.
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