Re: [PATCH v5 0/5] powerpc8xx: Further optimisation of TLB handling

[Scott Wood]

On Fri, 2015-04-17 at 18:32 +0200, root wrote:
> This patchset provides a further optimisation of TLB handling in the 8xx.
> Changes are:
> - Not saving registers like CR when not needed
> - Adding support to any TASK_SIZE
> 
> Only the last patch of the set is changed compared to v4
> 
> Christophe Leroy (5):
>   powerpc/8xx: macro for handling CPU15 errata
>   powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
>   powerpc/8xx: dont save CR in SCRATCH registers
>   powerpc/8xx: Use SPRG2 instead of DAR for saving r3
>   powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000
> 
>  arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++---------------
>  1 file changed, 51 insertions(+), 28 deletions(-)
> 

Do you really want your name in the git history to be "root"?

-Scott


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