Re: [RFCv3 PATCH 37/48] sched: Determine the current sched_group idle-state

From: Dietmar Eggemann
Date: Fri May 01 2015 - 11:09:35 EST


On 01/05/15 10:56, pang.xunlei@xxxxxxxxxx wrote:
> Hi Dietmar,
>
> Dietmar Eggemann <dietmar.eggemann@xxxxxxx> wrote 2015-05-01 AM 04:17:51:
>>
>> Re: [RFCv3 PATCH 37/48] sched: Determine the current sched_group
> idle-state
>>
>> On 30/04/15 06:12, pang.xunlei@xxxxxxxxxx wrote:
>> > linux-kernel-owner@xxxxxxxxxxxxxxx wrote 2015-02-05 AM 02:31:14:

[...]

> Thanks for explaining this in graphic detail.
>
> From what I understood, let's just assume ARM TC2 has an extra
> MC-level C-States SPC(assuming its power is 40 for the big).
>
> Take the power value from "RFCv3 PATCH 25/48":
> static struct idle_state idle_states_cluster_a15[] = {
> { .power = 70 }, /* WFI */
> { .power = 25 }, /* cluster-sleep-b */
> };
>
> static struct idle_state idle_states_core_a15[] = {
> { .power = 0 }, /* WFI */
> };
>
> Then we will get the following idle energy table?
> static struct idle_state idle_states_core_a15[] = {
> { .power = 70 }, /* WFI */
> { .power = 0 }, /* SPC*/
> };
>
> static struct idle_state idle_states_cluster_a15[] = {
> { .power = 40 }, /* SPC */
> { .power = 25 }, /* cluster-sleep-b */
> };
>
> Is this correct?

Yes. It's the same C-state configuration we have on our ARMv8 big.LITTLE
JUNO (Cortex A57, A53) board.

# cat /sys/devices/system/cpu/cpu0/cpuidle/state*/name
WFI
cpu-sleep-0
cluster-sleep-0

> If this is right, there may be a bug.
>
> For MC-level CPU0:
> sg_mask=0x1 sge->nr_idle_states=2 sge->idle_states_below=0
> cpuidle_idx=0 group_idx=1 shallowest_state=1
>
> See, group_idle_state() finally returns 1 as CPU0's MC-level
> idle engery model index, and this is obviously wrong.

Yes, I can see this problem too.

> So, I think for
> "int group_idx = cpuidle_idx - sge->idle_states_below + 1;"
>
> Maybe we shouldn't add the extra 1 for lowest levels?

Maybe. In any case we will have to resolve this issue in the next
version. Thanks for pointing this out!

[...]

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