On Thu, Apr 30, 2015 at 02:49:26PM -0400, Waiman Long wrote:
On 04/29/2015 02:11 PM, Peter Zijlstra wrote:So I do not think its correct, imagine the fabrics used for the 4096 cpu
On Fri, Apr 24, 2015 at 02:56:42PM -0400, Waiman Long wrote:I do think the code is OK. However, you are right that if my reasoning is
In the pv_scan_next() function, the slow cmpxchg atomic operation isYuck! I'm not at all sure you can make assumptions like that. And the
performed even if the other CPU is not even close to being halted. This
extra cmpxchg can harm slowpath performance.
This patch introduces the new mayhalt flag to indicate if the other
spinning CPU is close to being halted or not. The current threshold
for x86 is 2k cpu_relax() calls. If this flag is not set, the other
spinning CPU will have at least 2k more cpu_relax() calls before
it can enter the halt state. This should give enough time for the
setting of the locked flag in struct mcs_spinlock to propagate to
that CPU without using atomic op.
worst part is, if it goes wrong the borkage is subtle and painful.
incorrect, the resulting bug will be really subtle.
SGI machine, now add some serious traffic to them. There is no saying
your random 2k relax loop will be enough to propagate the change.
Equally, another arch (this is generic code) might have starvation
issues on its inter-cpu fabric and delay the store just long enough.
The thing is, one should _never_ rely on timing for correctness, _ever_.
So I am going toPlease wait a little while, I've queued the 'basic' patches, once that
withdraw this particular patch as it has no functional impact to the overall
patch series. Please let me know if you have any other comments on other
parts of the series and I will send send out a new series without this
particular patch.
settles in tip we can look at the others.
Also, I have some local changes (sorry, I could not help mysef) I should
post, I've been somewhat delayed by illness.