Re: [PATCH 08/13] KVM: x86: stubs for SMM support

[Radim KrÄmÃÅ]

2015-04-30 13:36+0200, Paolo Bonzini:
> This patch adds the interface between x86.c and the emulator: the
> SMBASE register, a new emulator flag, the RSM instruction.  It also
> adds a new request bit that will be used by the KVM_SMI ioctl.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> ---
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> @@ -2505,7 +2505,7 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
>  	vmx->nested.nested_vmx_misc_low &= VMX_MISC_SAVE_EFER_LMA;
>  	vmx->nested.nested_vmx_misc_low |=
>  		VMX_MISC_EMULATED_PREEMPTION_TIMER_RATE |
> -		VMX_MISC_ACTIVITY_HLT;
> +		VMX_MISC_ACTIVITY_HLT | VMX_MISC_IA32_SMBASE_MSR;
>  	vmx->nested.nested_vmx_misc_high = 0;
>  }
>  
>  bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
> @@ -2217,6 +2218,11 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case MSR_IA32_MISC_ENABLE:
>  		vcpu->arch.ia32_misc_enable_msr = data;
>  		break;
> +	case MSR_IA32_SMBASE:
> +		if (!msr_info->host_initiated)
> +			return 1;
> +		vcpu->arch.smbase = data;
> +		break;
>  	case MSR_KVM_WALL_CLOCK_NEW:
>  	case MSR_KVM_WALL_CLOCK:
>  		vcpu->kvm->arch.wall_clock = data;
> @@ -2612,6 +2618,11 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case MSR_IA32_MISC_ENABLE:
>  		msr_info->data = vcpu->arch.ia32_misc_enable_msr;
>  		break;
> +	case MSR_IA32_SMBASE:
> +		if (!msr_info->host_initiated && !is_smm(vcpu))
> +			return 1;
> +		msr_info->data = vcpu->arch.smbase;
> +		break;

(I'm not sure if this is supported if IA32_VMX_BASIC[49] = 0.
 34.15.6.4 Saving Guest State
   The SMM-transfer monitor (STM) can also discover the current value of
   the SMBASE register by using the RDMSR

 but it's not possible to get into STM without having a support for it
 noted in IA32_VMX_BASIC[49] and more magic we also don't emulate to
 actually enable it.)

> @@ -7208,6 +7240,8 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
>  	vcpu->arch.regs_avail = ~0;
>  	vcpu->arch.regs_dirty = ~0;
>  
> +	vcpu->arch.smbase = 0x30000;

It's not reset on INIT, only on RESET.  (34.11 SMBASE RELOCATION)
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