For deferred errors, the workaround is a little different as itOr, you can do the check for all families as we're behind a CPUID bit
applies to only the given family/model right now. If the workaround
needs to be applied for future processors, we can extend the family
check for those right?
anyway. This is why CPUID bits are a good thing :-)
If we setup 'm.addr' in amd_threshold_interrupt() andSo you can use mce_read_aux(), yeah, you can move it to mce-internal.h
amd_deferred_error_interrupt() properly, then amd_decode_mce() would
actually have some value in m->addr to report.
I didn't mean to say HW doesn't provide us the information in the addr
and/or the misc registers.
The addr, misc registers are still valid for threshold, deferred errors.But MCx_MISC is important for thresholding errors, it carries the ErrCnt
(Of course, misc is valid only if m->status & MCI_STATUS_MISCV)
My point was, in __log_error(), we can read relevant status and addr MSRs to
be passed to mce_log() as those are the only pieces of information we use in
the decoding chain; and discard the m.misc assignment we do for threshold
errors.
and stuff.
So you can pass a parameter to __log_error(..., threshold=true, misc)
and do
if (threshold)
m.misc = misc;
Right?