Re: Question about barriers for ARM on tools/perf/

From: David Ahern
Date: Fri May 08 2015 - 10:36:53 EST

On 5/8/15 8:27 AM, Will Deacon wrote:
On Fri, May 08, 2015 at 03:25:13PM +0100, Peter Zijlstra wrote:
On Fri, May 08, 2015 at 03:21:08PM +0100, Will Deacon wrote:
Wouldn't it be better to go the other way, and use compiler builtins for
the memory barriers instead of relying on the kernel? It looks like the
perf_mmap__{read,write}_head functions are basically just acquire/release
operations and could therefore be implemented using something like
__atomic_load_n(&pc->data_head, __ATOMIC_ACQUIRE) and
__atomic_store_n(&pc->data_tail, tail, __ATOMIC_RELEASE).

He wants to do smp refcounting, which needs atomic_inc() /
atomic_inc_non_zero() / atomic_dec_return() etc..

Right, of course, but GCC has those too:

And we need a solution that works from RHEL5 forward. Not sure what gcc version that is; RHEL6 uses 4.4.7. We have done a prototype with the __sync functions and it worked nicely.


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