Re: [Intel-gfx] [WARNING 4.1-rc2] i915: Unclaimed register detected before writing to register 0xc4040

[Daniel Vetter]

On Fri, May 08, 2015 at 12:57:01PM -0400, Steven Rostedt wrote:
> On Fri, 8 May 2015 12:18:10 -0400
> Steven Rostedt <rostedt@xxxxxxxxxxx> wrote:
> 
> > On Fri, 8 May 2015 12:08:31 -0400
> > Steven Rostedt <rostedt@xxxxxxxxxxx> wrote:
> > 
> > 
> > > Maybe it's my bios still (it is an older box). I'll just block out
> > > compiling in SND_HDA_INTEL, so that it doesn't break my tests (they
> > > fail on a WARNING).
> > 
> > Hmm, right after I posted this I triggered the Call Trace again with 
> > 
> > # CONFIG_SND_HDA_INTEL is not set
> > 
> > :-/
> > 
> > Now to figure out how to keep this from triggering. I may just keep
> > adding a patch to hide that warning.

Ok, so it's really i915 to blame for this.

> Oh, I forgot to mention, that before the Call Trace, I get theses:
> 
> 
> [  673.093330] [drm:intel_uncore_check_errors] *ERROR* Unclaimed register before interrupt
> [  673.103206] [drm:intel_uncore_check_errors] *ERROR* Unclaimed register before interrupt
> [  673.139252] [drm:intel_uncore_check_errors] *ERROR* Unclaimed register before interrupt
> [  673.151323] [drm:ivybridge_set_fifo_underrun_reporting] *ERROR* uncleared fifo underrun on pipe A
> [  673.160745] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe A FIFO underrun
> 
> Mean anything?

Display fifo underflow. It doesn happen very rarely when we change the
configuration of cursors/overlays (because our code sucks, getting fixed).
But in general I though we've curbed most of them ...

How easy is this to reproduce? It would be interesting to see what the
driver is doing with drm.debug=0xe, but that's a veritable firehose. You
can change that modparam in /sys/modules/drm/parameters/debug at runtime
and it has immediate effect. But we don't keep a running log around.
 
Other things to check:
- Is the fifo underrun always right next to to unclaimed register issue in
  dmesg?
- i915.mmio_debug=10 or so for hopefully more information around the next
  splat. Has some gfx performance impact though.

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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