Re: [patch 4/6] x86, perf, cqm: Avoid pointless msr write
From: Matt Fleming
Date: Tue May 19 2015 - 05:18:10 EST
On Tue, 19 May, at 12:00:55AM, Thomas Gleixner wrote:
> If the usage counter is non-zero there is no point to update the rmid
> in the PQR MSR.
>
> Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> ---
> arch/x86/kernel/cpu/perf_event_intel_cqm.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
Good catch.
Acked-by: Matt Fleming <matt.fleming@xxxxxxxxx>
--
Matt Fleming, Intel Open Source Technology Center
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