Re: [PATCH 02/10] perf/x86: Improve HT workaround GP counter constraint

From: Stephane Eranian
Date: Fri May 22 2015 - 08:35:24 EST


On Fri, May 22, 2015 at 4:28 AM, Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> On Fri, May 22, 2015 at 01:21:46PM +0200, Peter Zijlstra wrote:
>> @@ -821,8 +828,24 @@ int x86_schedule_events(struct cpu_hw_ev
>>
>> /* slow path */
>> if (i != n) {
>> + int gpmax = x86_pmu.num_counters / 2;
>> +
>> + /*
>> + * Do not allow scheduling of more than half the available
>> + * generic counters.
>> + *
>> + * This helps avoid counter starvation of sibling thread by
>> + * ensuring at most half the counters cannot be in exclusive
>> + * mode. There is no designated counters for the limits. Any
>> + * N/2 counters can be used. This helps with events with
>> + * specific counter constraints.
>> + */
>> + if (is_ht_workaround_enabled() && !cpuc->is_fake &&
>> + READ_ONCE(cpuc->excl_cntrs->exclusive_present))
>> + gpmax /= 2;
>> +
>> unsched = perf_assign_events(cpuc->event_constraint, n, wmin,
>> - wmax, assign);
>> + wmax, gpmax, assign);
>> }
>>
>
> Hmm, I divide by 2 twice.. no wonder it doesn't quite work as expected.

Yes, that's what I said. Other problem is, with no watchdog, measuring
a non-corrupting event is still multiplexing when more than 2 instances
are passed:
$ perf stat -a -C 0 -e r20cc,r20cc,r20cc,r20cc -I 1000 sleep 100

I get 50% scheduling, only 2 out of 4 events scheduled at any time.

There is nothing running on the sibling thread, so it should let me run with 4
instances as per your patch.
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