[tip:perf/core] perf tools: Disallow PMU events intel_pt and intel_bts until there is support

[tip-bot for Adrian Hunter]

Commit-ID:  9b5d1c29556989aa9dc1240566e78806ddefd160
Gitweb:     http://git.kernel.org/tip/9b5d1c29556989aa9dc1240566e78806ddefd160
Author:     Adrian Hunter <adrian.hunter@xxxxxxxxx>
AuthorDate: Fri, 22 May 2015 14:53:58 +0300
Committer:  Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
CommitDate: Wed, 27 May 2015 12:21:45 -0300

perf tools: Disallow PMU events intel_pt and intel_bts until there is support

Disallow PMU events intel_pt and intel_bts until the tools support them.

By default any PMU is selectable as an event but until the tools have
intel_pt and intel_bts support using them would result in no data being
recorded without any indication as to why.

Before the change:

    $ perf record -e intel_bts// sleep 1
    [ perf record: Woken up 1 times to write data ]
    [ perf record: Captured and wrote 0.008 MB perf.data ]
    $ perf report --stdio
    Error:
    The perf.data file has no samples!

After the change:

    $ perf record -e intel_bts// sleep 1
    invalid or unsupported event: 'intel_bts//'
    Run 'perf list' for a list of valid events

Reported-by: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
Signed-off-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
Cc: Jiri Olsa <jolsa@xxxxxxxxxx>
Link: http://lkml.kernel.org/r/1432295653-13989-2-git-send-email-adrian.hunter@xxxxxxxxx
Signed-off-by: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
---
 tools/perf/util/pmu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index 244c66f..5d3ab7c 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -442,6 +442,10 @@ static struct perf_pmu *pmu_lookup(const char *name)
 	LIST_HEAD(aliases);
 	__u32 type;
 
+	/* No support for intel_bts or intel_pt so disallow them */
+	if (!strcmp(name, "intel_bts") || !strcmp(name, "intel_pt"))
+		return NULL;
+
 	/*
 	 * The pmu data we store & need consists of the pmu
 	 * type value and format definitions. Load both right
--
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