[PATCHv2 10/16] vme: ca91cx42: fix LM_CTL address mask
From: Dmitry Kalinkin
Date: Thu May 28 2015 - 05:33:02 EST
Universe II datasheet defines following address space values
for LM_CTL[16:18]
000=A16
001=A24
010=A32
011,100,101=Reserved
110=User1
111=User2
Mask 5<<16 is not the right one for matching [16:18], instead we should
use 7<<16.
Signed-off-by: Dmitry Kalinkin <dmitry.kalinkin@xxxxxxxxx>
Cc: Igor Alekseev <igor.alekseev@xxxxxxx>
Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
---
drivers/vme/bridges/vme_ca91cx42.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/vme/bridges/vme_ca91cx42.h b/drivers/vme/bridges/vme_ca91cx42.h
index d46b12d..d54119e 100644
--- a/drivers/vme/bridges/vme_ca91cx42.h
+++ b/drivers/vme/bridges/vme_ca91cx42.h
@@ -547,7 +547,7 @@ static const int CA91CX42_LINT_LM[] = { CA91CX42_LINT_LM0, CA91CX42_LINT_LM1,
#define CA91CX42_LM_CTL_DATA (1<<22)
#define CA91CX42_LM_CTL_SUPR (1<<21)
#define CA91CX42_LM_CTL_NPRIV (1<<20)
-#define CA91CX42_LM_CTL_AS_M (5<<16)
+#define CA91CX42_LM_CTL_AS_M (7<<16)
#define CA91CX42_LM_CTL_AS_A16 0
#define CA91CX42_LM_CTL_AS_A24 (1<<16)
#define CA91CX42_LM_CTL_AS_A32 (1<<17)
--
1.8.3.1
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