[PATCH v2 0/2] staging: rtl8723au: core: endianness issues

From: David Decotigny
Date: Sun Jun 07 2015 - 20:43:45 EST


The code shows a couple inconsistencies (described in commit
descriptions) which would not be an issue on little-endian cpus, but
could cause breakage on non-LE cpus. Note: I could not test on real
hardware, these patches created based on sparse reports.

Hostory:
- resending the same patches to correct recipients, only changed
commit descriptions (credits to Dan Carpenter)

############################################
# Patch Set Summary:

David Decotigny (2):
staging: rtl8723au: core: avoid bitwise arithmetic with forced
endianness
staging: rtl8723au: core: remove redundant endianness conversion

drivers/staging/rtl8723au/core/rtw_mlme_ext.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)

--
2.2.0.rc0.207.ga3a616c

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