Re: [PATCH 2/2] perf/x86/intel: Fix PMI handling for Intel PT

[Peter Zijlstra]

On Fri, Jun 12, 2015 at 12:08:35PM +0300, Alexander Shishkin wrote:
> From: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>
> Date: Tue, 9 Jun 2015 13:03:26 +0300
> Subject: [PATCH] perf/x86/intel: Fix PMI handling for Intel PT
> 
> Since Intel PT is a separate pmu and is not using any of the x86_pmu
> code paths, which means in particular that active_events counter remains
> intact when new PT events are created. However, PT uses x86_pmu PMI
> handler for its PMI handling needs. The problem here is that the latter
> checks active_events and in case of it being zero, exits without calling
> the actual x86_pmu.handle_nmi(), which results in unknown NMI errors and
> massive data loss for PT.
> 
> The effect is not visible if there are other perf events in the system
> at the same time that keep active_events counter non-zero, for instance
> if the NMI watchdog is running, so one needs to disable it to reproduce
> the problem.
> 
> At the same time, the active_events counter besides doing what the name
> suggests also implicitly serves as a pmc hardware and DS area reference
> counter.
> 
> This patch adds a separate reference counter for the pmc hardware, leaving
> active_events for actually counting the events and makes sure it also
> counts PT and BTS events.
> 
> Signed-off-by: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>

Thanks.
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