RE: [PATCH v2 2/2] dma: Add Xilinx zynqmp dma engine driver support

[Punnaiah Choudary Kalluri]

> -----Original Message-----
> From: Shubhrajyoti Datta [mailto:omaplinuxkernel@xxxxxxxxx]
> Sent: Monday, June 15, 2015 8:35 PM
> To: Punnaiah Choudary Kalluri
> Cc: robh+dt@xxxxxxxxxx; pawel.moll@xxxxxxx; mark.rutland@xxxxxxx;
> ijc+devicetree@xxxxxxxxxxxxxx; Kumar Gala; Michal Simek; Soren Brinkmann;
> vinod.koul@xxxxxxxxx; dan.j.williams@xxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; Linux Kernel Mailing List; kpc528@xxxxxxxxx;
> kalluripunnaiahchoudary@xxxxxxxxx; dmaengine@xxxxxxxxxxxxxxx;
> Punnaiah Choudary Kalluri; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v2 2/2] dma: Add Xilinx zynqmp dma engine driver
> support
> 
> On Mon, Jun 15, 2015 at 8:06 PM, Punnaiah Choudary Kalluri
> <punnaiah.choudary.kalluri@xxxxxxxxxx> wrote:
> > Added the basic driver for zynqmp dma engine used in Zynq
> > UltraScale+ MPSoC. The initial release of this driver supports
> > only memory to memory transfers.
> >
> > Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xxxxxxxxxx>
> > ---
> <snip>
> 
> > +/**
> > + * zynqmp_dma_chan_is_idle - Provides the channel idle status
> > + * @chan: ZynqMP DMA DMA channel pointer
> > + *
> > + * Return: '1' if the channel is idle otherwise '0'
> > + */
> > +static int zynqmp_dma_chan_is_idle(struct zynqmp_dma_chan *chan)
> 
> maybe this could return bool.

Ok. I will modify the return type.

Regards,
Punnaiah
> 
> > +{
> > +       u32 regval;
> > +
> > +       regval = readl(chan->regs + STATUS);
> > +       if (regval & STATUS_BUSY)
> > +               return 0;
> > +
> > +       return 1;
> > +}
> > +