On 6/25/2015 7:45 AM, Mark Rutland wrote:Does it mean that keystone_defconfig must always have CONFIG_HOTPLUG_CPU and CONFIG_ARM_PSCI enabled?
Hi,Good point about CPU_ON. We need that as well.
On Thu, Jun 25, 2015 at 03:02:50PM +0100, Vitaly Andrianov wrote:
This commit add cpu_die implementation using psci api
I don't understand. If you have a PSCI implementation, it should be
sufficient to have a PSCI node (and enable-method) in your DT, and the
generic code will be used. Nothing should be required in your board
code.
You should also use CPU_ON to bring secondaries online rather than
mixing up PSCI and platform-specific mechanisms.
That will be a nice trick. FW already does some tweaks of dts for
Signed-off-by: Vitaly Andrianov <vitalya@xxxxxx>
---
arch/arm/mach-keystone/platsmp.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/mach-keystone/platsmp.c
b/arch/arm/mach-keystone/platsmp.c
index 5f46a7c..2c40cc0 100644
--- a/arch/arm/mach-keystone/platsmp.c
+++ b/arch/arm/mach-keystone/platsmp.c
@@ -20,6 +20,7 @@
#include <asm/prom.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>
+#include <asm/psci.h>
#include "keystone.h"
@@ -51,7 +52,38 @@ static inline void __cpuinit
keystone_smp_secondary_initmem(unsigned int cpu)
{}
#endif
+
+#ifdef CONFIG_HOTPLUG_CPU
+static void keystone_cpu_die(unsigned int cpu)
+{
+#ifdef CONFIG_ARM_PSCI
+ struct psci_power_state pwr_state = {0, 0, 0};
+
+ pr_info("keystone_cpu_die(%d) from %d using PSCI\n", cpu,
+ smp_processor_id());
+
+ if (psci_ops.cpu_off)
+ psci_ops.cpu_off(pwr_state);
+#else
+ /*
+ * We may want to add here a direct smc call to monitor
+ * if the kernel doesn't support PSCI API
+ */
+#endif
You should determine this from your DT. Your FW/bootloader can patch in
the relevant nodes and properties when support is present, so the
presence of such nodes should guarantee that PSCI is available.
LPAE/non_LPAE tweaks.
Regards,
Santosh