Micron QUAD mode expects command, address and data on 4 lanes instead of just
one for command (extended SPI mode). This requires the controller to be in a
special mode, so check first if the controller could be in that mode. If a
controller does not have the SPI_TX_QUAD mode set, this setting has no chance
of being valid at all, so don't try to enable it then, and just keep using
the extended SPI mode.
Tested on a Zynq 7000 with a n25q256a flash chip, this failed to function
because of the introduction of:
"driver:mtd:spi-nor: Add quad I/O support for Micron spi nor"
This commit sets QUAD mode for most Micron chips without asking the controller
whether it's possible to do so, and without telling the controller that a
different mode is required, so it couldn't work.
Signed-off-by: Mike Looijmans <mike.looijmans@xxxxxxxx>
---
drivers/mtd/spi-nor/spi-nor.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index e8f6131..10ba94f 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1398,6 +1398,8 @@ static int set_quad_mode(struct spi_nor *nor, struct flash_info *info)
}
return status;
case CFI_MFR_ST:
+ if (!(nor->spi->mode & SPI_TX_QUAD))
+ return 0;
status = micron_quad_enable(nor);
if (status) {
dev_err(nor->dev, "Micron quad-read not enabled\n");