Re: Kernel broken on processors without performance counters

From: Peter Zijlstra
Date: Wed Jul 08 2015 - 12:08:11 EST


On Wed, Jul 08, 2015 at 11:17:38AM -0400, Mikulas Patocka wrote:
> Hi
>
> I found out that the patch a66734297f78707ce39d756b656bfae861d53f62 breaks
> the kernel on processors without performance counters, such as AMD K6-3.
> Reverting the patch fixes the problem.
>
> The static key rdpmc_always_available somehow gets set (I couldn't really
> find out what is setting it, the function set_attr_rdpmc is not executed),
> cr4_set_bits(X86_CR4_PCE) is executed and that results in a crash on boot
> when attempting to execute init, because the proecssor doesn't support
> that bit in CR4.

Urgh, the static key trainwreck bites again.

One is not supposed to mix static_key_true() and STATIC_KEY_INIT_FALSE.

Does this make it go again?

---
arch/x86/include/asm/mmu_context.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 5e8daee7c5c9..804a3a6030ca 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -23,7 +23,7 @@ extern struct static_key rdpmc_always_available;

static inline void load_mm_cr4(struct mm_struct *mm)
{
- if (static_key_true(&rdpmc_always_available) ||
+ if (static_key_false(&rdpmc_always_available) ||
atomic_read(&mm->context.perf_rdpmc_allowed))
cr4_set_bits(X86_CR4_PCE);
else
--
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