Re: [PATCH 0/2] New NAND chip IDs
From: Hans de Goede
Date: Tue Jul 28 2015 - 11:33:12 EST
Hi,
On 07/28/2015 05:30 PM, Boris Brezillon wrote:
On Tue, 28 Jul 2015 17:19:40 +0200
Boris Brezillon <boris.brezillon@xxxxxxxxxxxxxxxxxx> wrote:
Hi Hans,
Here is a more appropriate answer ;-)
On Tue, 28 Jul 2015 16:49:58 +0200
Hans de Goede <hdegoede@xxxxxxxxxx> wrote:
Hi,
On 07/28/2015 04:29 PM, Michal Suchanek wrote:
Hello,
the NAND chips on Cubietech boards are not known to Linux.
I used Petros Angelatos' patch from sunxi experimental tree for one chip and
added another chip.
I hope it's ok to send both patches to avoid merge conflict.
I do not think that these patches are a good idea, this will lead to an
ever growing manual maintained list of ids, and that is not maintainable
IMHO.
For Samsung chips we only need the ecc strength and size the rest is already
detected on the fly, and I've a patch in my personal tree to get the
ecc strengt and size from the nand without needing to have an entry per
chip:
https://github.com/jwrdegoede/linux-sunxi/commit/53b335d33232753b7aa70298009158baadf5a6bf
This is IMHO a much better solution.
Yes, indeed, this is a better approach, but AFAIR, not all Samsung
chips use this layout to expose the ECC strength/size info, and I
guess this is why this method is not used to retrieve the ECC
requirements.
At least this was true for Hynix chips (see this thread [1]).
[1]http://comments.gmane.org/gmane.linux.drivers.mtd/50252
Correct, I tried to write a similar patch and come to the same
conclusion, there is no way to reliable detect ecc strength / size
in a generic manner for hynix ic-s, for samsung ic-s the bits used
seem to be consistent for all samsung nands though. See the list of
datasheets I checked in the commit msg.
Regards,
Hans
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