[tip:locking/core] locking/lockref: Remove homebrew cmpxchg64_relaxed() macro definition

From: tip-bot for Will Deacon
Date: Wed Aug 12 2015 - 08:36:07 EST

Commit-ID: f5468ffde13fc991bd4d6bdec507ffd5777865bd
Gitweb: http://git.kernel.org/tip/f5468ffde13fc991bd4d6bdec507ffd5777865bd
Author: Will Deacon <will.deacon@xxxxxxx>
AuthorDate: Thu, 6 Aug 2015 17:54:40 +0100
Committer: Ingo Molnar <mingo@xxxxxxxxxx>
CommitDate: Wed, 12 Aug 2015 11:59:04 +0200

locking/lockref: Remove homebrew cmpxchg64_relaxed() macro definition

cmpxchg64_relaxed() is now defined by linux/atomic.h, so we can
remove our local definition from the lockref code.

Signed-off-by: Will Deacon <will.deacon@xxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: Waiman.Long@xxxxxx
Cc: paulmck@xxxxxxxxxxxxxxxxxx
Link: http://lkml.kernel.org/r/1438880084-18856-5-git-send-email-will.deacon@xxxxxxx
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
lib/lockref.c | 8 --------
1 file changed, 8 deletions(-)

diff --git a/lib/lockref.c b/lib/lockref.c
index 494994b..5a92189 100644
--- a/lib/lockref.c
+++ b/lib/lockref.c
@@ -4,14 +4,6 @@

- * Allow weakly-ordered memory architectures to provide barrier-less
- * cmpxchg semantics for lockref updates.
- */
-#ifndef cmpxchg64_relaxed
-# define cmpxchg64_relaxed cmpxchg64
* Note that the "cmpxchg()" reloads the "old" value for the
* failure case.
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