Re: [PATCH 2/2] acpi, apei: use appropriate pgprot_t to map GHES memory

[Matt Fleming]

On Fri, 14 Aug, at 03:37:30PM, Jonathan (Zhixiong) Zhang wrote:
> From: "Jonathan (Zhixiong) Zhang" <zjzhang@xxxxxxxxxxxxxx>
> 
> With ACPI APEI firmware first handling, generic hardware error
> record is updated by firmware in GHES memory region. On an arm64
> platform, firmware updates GHES memory region with uncached
> access attribute, and then Linux reads stale data from cache.
> 
> With current code, GHES memory region is mapped with PAGE_KERNEL
> based on the assumption that cache coherency of GHES memory region
> is maintained by firmware on all platforms. This assumption is
> not true for above mentioned arm64 platform.
> 
> Instead GHES memory region should be mapped with page protection type
> according to what is returned from arch_apei_get_mem_attribute().
> 
> Acked-by: Borislav Petkov <bp@xxxxxxx>
> Signed-off-by: Jonathan (Zhixiong) Zhang <zjzhang@xxxxxxxxxxxxxx>
> ---
>  drivers/acpi/apei/ghes.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
> index 23981ac1c6c2..f742335bd8bb 100644
> --- a/drivers/acpi/apei/ghes.c
> +++ b/drivers/acpi/apei/ghes.c
> @@ -160,8 +160,10 @@ static void __iomem *ghes_ioremap_pfn_irq(u64 pfn)
>  	unsigned long vaddr;
>  
>  	vaddr = (unsigned long)GHES_IOREMAP_IRQ_PAGE(ghes_ioremap_area->addr);
> -	ioremap_page_range(vaddr, vaddr + PAGE_SIZE,
> -			   pfn << PAGE_SHIFT, PAGE_KERNEL);
> +	ioremap_page_range(vaddr,
> +			   vaddr + PAGE_SIZE,
> +			   pfn << PAGE_SHIFT,
> +			   arch_apei_get_mem_attribute(pfn << PAGE_SHIFT));
>  
>  	return (void __iomem *)vaddr;
>  }

Y'know, this would be more readable if written as,

	unsigned long vaddr, paddr;
	pgprot_t prot;

  	vaddr = (unsigned long)GHES_IOREMAP_IRQ_PAGE(ghes_ioremap_area->addr);

	paddr = pfn << PAGE_SHIFT;
	prot = arch_apei_get_mem_attribute(paddr);

	ioremap_page_range(vaddr, vaddr + PAGE_SIZE, paddr, prot);

But either way,

Reviewed-by: Matt Fleming <matt.fleming@xxxxxxxxx>

-- 
Matt Fleming, Intel Open Source Technology Center
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