Re: [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted

[Paolo Bonzini]

On 03/09/2015 07:18, Nakajima, Jun wrote:
> On Wed, Sep 2, 2015 at 3:38 PM, Steve Rutherford <srutherford@xxxxxxxxxx> wrote:
>> On Thu, Aug 13, 2015 at 09:31:48AM +0200, Paolo Bonzini wrote:
>> Pinging this thread.
>>
>> Should I put together a patch to make split irqchip work properly with the old TMR behavior?
> 
> Yes, please.
> 
> Intel 64 and IA-32 Architectures Software Developerâs Manual:
> 
> 24.11.4 Software Access to Related Structures
> 
> In addition to data in the VMCS region itself, VMX non-root operation
> can be controlled by data structures that are
> referenced by pointers in a VMCS (for example, the I/O bitmaps).

The SDM does not list these data structures however.  It also does not
say that, whenever a page is pointed to by the VMCS, *the whole page*
counts as a control data structure.

In http://article.gmane.org/gmane.linux.kernel/2011131 I explained my
reading of the manual and why the vTMR is IMO not part of the control
data structures.  In a nutshell, the vISR, vIRR, vTPR, vPPR etc. are
control data structures, but the other fields look to me like they are
just data.  Jun, can you find anything wrong in the reasoning?

Next week I'll write test cases for it, which are worthwhile anyway.  In
the meanwhile, if Steve wants to prepare a patch that injects level
interrupts (those that have to set the vTMR to 1) while the VCPU is not
running, that would also work great for me as I was going to look into
that anyway.

Paolo

 While
> the pointers to these data structures are
> parts of the VMCS, the data structures themselves are not. They are
> not accessible using VMREAD and VMWRITE
> but by ordinary memory writes.
> Software should ensure that each such data structure is modified only
> when no logical processor with a current
> VMCS that references it is in VMX non-root operation. Doing otherwise
> may lead to unpredictable behavior
> (including behaviors identified in Section 24.11.1)
> 
> 
> 29.6 POSTED-INTERRUPT PROCESSING
> ...
> Use of the posted-interrupt descriptor differs from that of other data
> structures that are referenced by pointers in
> a VMCS. There is a general requirement that software ensure that each
> such data structure is modified only when
> no logical processor with a current VMCS that references it is in VMX
> non-root operation. That requirement does
> not apply to the posted-interrupt descriptor. There is a requirement,
> however, that such modifications be done
> using locked read-modify-write instructions.
> 
> 
>>
>>>
>>>
>>> On 13/08/2015 08:35, Zhang, Yang Z wrote:
>>>>> You may be right. It is safe if no future hardware plans to use
>>>>> it. Let me check with our hardware team to see whether it will be
>>>>> used or not in future.
>>>>
>>>> After checking with Jun, there is no guarantee that the guest running
>>>> on another CPU will operate properly if hypervisor modify the vTMR
>>>> from another CPU. So the hypervisor should not to do it.
>>>
>>> I guess I can cause a vmexit on level-triggered interrupts, it's not a
>>> big deal, but no weasel words, please.
>>>
>>> What's going to break, and where is it documented?
>>>
>>> Paolo
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> 
> 
> 
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