RE: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe

From: Ranjit Abhimanyu Waghmode
Date: Fri Sep 04 2015 - 08:02:41 EST

Hi Mark,

> -----Original Message-----
> From: Mark Brown [mailto:broonie@xxxxxxxxxx]
> Sent: Thursday, September 03, 2015 5:43 PM
> To: Ranjit Abhimanyu Waghmode
> Cc: dwmw2@xxxxxxxxxxxxx; computersforpeace@xxxxxxxxx; Michal Simek;
> Soren Brinkmann; zajec5@xxxxxxxxx; ben@xxxxxxxxxxxxxxx; marex@xxxxxxx;
> b32955@xxxxxxxxxxxxx; knut.wohlrab@xxxxxxxxxxxx; juhosg@xxxxxxxxxxx;
> beanhuo@xxxxxxxxxx; linux-mtd@xxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; linux-spi@xxxxxxxxxxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx; Harini Katakam; Punnaiah Choudary Kalluri
> Subject: Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data
> stripe
> On Wed, Aug 26, 2015 at 11:56:04AM +0530, Ranjit Waghmode wrote:
> > To support dual parallel mode operation of ZynqMP GQSPI controller
> > following API's are added inside the core:
> As covered in SubmittingPatches please try to make each patch a single change
> rather than having multiple separate changes in one commit.
I will split the patch.
> > + /* Controller may support more than one chip.
> > + * This flag will enable that feature.
> > + */
> > +#define SPI_MASTER_BOTH_CS BIT(8) /* enable both
> chips */
> This isn't saying that the controller supports more than one chip, it's saying that
> the controller supports asserting more than one chip select at once which isn't
> the same thing. I'm also not entirely sure that this makes sense as a separate
> feature to the data striping one - I'm struggling to think of a way to use this
> sensibly separately to that.
If the SPI controller is having more than one chip select and the data lines are distributed equally.
And also there is requirement to activate all the chip selects in one go.

Now we can consider following use cases:

Suppose we need to send the same data to multiple slaves of same kind:
Here the application need not to do individual slave access for writing, instead it can send data to all the devices in one go.

Let's take another case where application is trying to send data in such a way that first nibble of the byte will got to the one slave and the second nibble of the byte will go to the other slave:
Here data in slave devices can be organized by taking advantage of above topology along with the support in hardware.

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