Re: [PATCH 2/4] gpio: qcom-smsm: Add driver for Qualcomm SMSM
From: Linus Walleij
Date: Tue Sep 08 2015 - 08:58:37 EST
On Thu, Aug 27, 2015 at 7:37 PM, Bjorn Andersson
<bjorn.andersson@xxxxxxxxxxxxxx> wrote:
> This driver exposed the Qualcomm Shared Memory State Machine bits as
> GPIOs to the system.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxxxxxx>
(...)
> +/*
> + * This driver implements the Qualcomm Shared Memory State Machine, a mechanism
> + * for communicating single bit state information to remote processors.
> + *
> + * The implementation is based on two sections of shared memory; the first
> + * holding the state bits and the second holding a matrix of subscription bits.
> + *
> + * The state bits are structured in entries of 32 bits, each belonging to one
> + * system in the SoC. The entry belonging to the local system is considered
> + * read-write, while the rest should be considered read-only.
> + *
> + * The subscription matrix consists of N bitmaps per entry, denoting interest
> + * in updates of the entry for each of the N hosts. Upon updating a state bit
> + * each host's subscription bitmap should be queried and the remote system
> + * should be interrupted if they request so.
> + *
> + * The subscription matrix is laid out in entry-major order:
> + * entry0: [host0 ... hostN]
> + * .
> + * .
> + * entryM: [host0 ... hostN]
> + *
> + * A third, optional, shared memory region might contain information regarding
> + * the number of entries in the state bitmap as well as number of columns in
> + * the subscription matrix.
> + */
This does seem like a real bad fit to GPIO for me, sorry.
IMO this is drivers/soc/qcom, using regmap and possibly
regmap IRQs-material.
Yours,
Linus Walleij
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