Re: [PATCH v5 2/4] clk: qcom: Add support for RCGs with shared branches

[Stephen Boyd]

On 09/17, Georgi Djakov wrote:
> +
> +static unsigned long
> +clk_rcg2_shared_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
> +{
> +	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
> +	unsigned long rate;
> +	u32 cfg, hid_div, mask;
> +
> +	regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);
> +
> +	mask = BIT(rcg->hid_width) - 1;
> +	hid_div = cfg >> CFG_SRC_DIV_SHIFT;
> +	hid_div &= mask;
> +
> +	rate = (parent_rate * 2) / (hid_div + 1);
> +
> +	rcg->current_freq = rate;
> +

We didn't need to copy/paste/hack the clk_rcg2_recalc_rate()
code. I squashed this in.

diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index c7b9b32742e5..b544bb302f79 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -350,20 +350,8 @@ static unsigned long
 clk_rcg2_shared_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
 {
 	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
-	unsigned long rate;
-	u32 cfg, hid_div, mask;
 
-	regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);
-
-	mask = BIT(rcg->hid_width) - 1;
-	hid_div = cfg >> CFG_SRC_DIV_SHIFT;
-	hid_div &= mask;
-
-	rate = (parent_rate * 2) / (hid_div + 1);
-
-	rcg->current_freq = rate;
-
-	return rate;
+	return rcg->current_freq = clk_rcg2_recalc_rate(hw, parent_rate);
 }
 
 static int clk_rcg2_shared_enable(struct clk_hw *hw)
-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/