Re: [PATCH] MIPS: allow 24Hz timer frequency

[Ralf Baechle]

On Tue, Sep 22, 2015 at 10:16:39AM -0700, Paul Burton wrote:

> A boundary exists beyond which the timer frequency becomes high enough
> that timer interrupts saturate the system and either cause it to slow to
> a crawl or stop functioning entirely. Where that boundary lies depends
> upon a number of factors such as the overhead of each interrupt and the
> overall speed of the CPU, but correlates strongly with the clock
> frequency at which the CPU runs. When running on emulators during
> bringup or debug of a CPU that clock frequency is very low, which
> results in the boundary at which the timer frequency becomes
> unsustainable being very low. The current minimum of 48Hz pushes against
> boundary in certain situations in current systems. Allow the kernel to
> be configured for a 24Hz timer frequency in order to avoid problems on
> such slow running systems.

The current minimum of 48Hz in the MIPS kconfig files predates the
rewrites to use clocksource/clockevent device in 2.6.27 or so.  The
value of 48Hz is the lowest value at which the old time code was still
working properly.  Afair the change was submitted by Kevin Kissel or
Chris Dearman to improve performance on with emulated CPUs which by that
time were running at like 500kHz (I think it was an IKOS) clock rate.
Presumably below 48Hz the math in the kernel's time code was falling
apart but anyway, afaics the value was derived experimentally.

  Ralf
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