Re: [PATCH v2 3/3] ASoC: da7213: Add bindings documentation for codec driver

[Rob Herring]

On Wed, Oct 7, 2015 at 8:27 AM, Adam Thomson
<Adam.Thomson.Opensource@xxxxxxxxxxx> wrote:
> Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@xxxxxxxxxxx>
> ---
>  Documentation/devicetree/bindings/sound/da7213.txt | 41 ++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/sound/da7213.txt
>
> diff --git a/Documentation/devicetree/bindings/sound/da7213.txt b/Documentation/devicetree/bindings/sound/da7213.txt
> new file mode 100644
> index 0000000..7280e82
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/da7213.txt
> @@ -0,0 +1,41 @@
> +Dialog Semiconductor DA7213 Audio Codec bindings
> +
> +======
> +
> +Required properties:
> +- compatible : Should be "dlg,da7213"
> +- reg: Specifies the I2C slave address
> +
> +Optional properties:
> +- clocks : phandle and clock specifier for codec MCLK.
> +- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
> +
> +- dlg,micbias1-lvl : Voltage (mV) for Mic Bias 1
> +       [<1600>, <2200>, <2500>, <3000>]
> +- dlg,micbias2-lvl : Voltage (mV) for Mic Bias 2
> +       [<1600>, <2200>, <2500>, <3000>]

Please append the units (-microvolt).

> +- dlg,dmic-data-sel : DMIC channel select based on clock edge.
> +       ["lrise_rfall", "lfall_rrise"]
> +- dlg,dmic-samplephase : When to sample audio from DMIC.
> +       ["on_clkedge", "between_clkedge"]

How about boolean for these two.

> +- dlg,dmic-clkrate : DMIC clock frequency (MHz).
> +       [<1500000>, <3000000>]

So 1.5GHz or 3GHz?

Add units (-hz).

> +
> +======
> +
> +Example:
> +
> +       codec_i2c: da7213@1a {
> +               compatible = "dlg,da7213";
> +               reg = <0x1a>;
> +
> +               clocks = <&clks 201>;
> +               clock-names = "mclk";
> +
> +               dlg,micbias1-lvl = <2500>;
> +               dlg,micbias2-lvl = <2500>;
> +
> +               dlg,dmic-data-sel = "lrise_rfall";
> +               dlg,dmic-samplephase = "between_clkedge";
> +               dlg,dmic-clkrate = <3000000>;
> +       };
> --
> 1.9.3
>
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