[PATCH 5/5] ARM: OMAP2+: Update gpmc and nand DT binding documentation
From: Franklin S Cooper Jr
Date: Mon Oct 12 2015 - 21:39:34 EST
Add additional details to the gpmc and nand documentation to clarify
what is needed to enable nand dma prefetch.
Signed-off-by: Franklin S Cooper Jr <fcooper@xxxxxx>
---
Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt | 7 ++++++-
Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 2 ++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
index 704be93..b1e2802 100644
--- a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
@@ -33,6 +33,10 @@ Required properties:
As this will change in the future, filling correct
values here is a requirement.
+GPMC DMA information. Required only when GPMC nand prefetch is enabled.
+ - dmas GPMC nand prefetch dma channel
+ - dma-names DMA channel name use as a reference within the Nand driver
+
Timing properties for child nodes. All are optional and default to 0.
- gpmc,sync-clk-ps: Minimum clock period for synchronous mode, in picoseconds
@@ -119,7 +123,8 @@ Example for an AM33xx board:
ti,hwmods = "gpmc";
reg = <0x50000000 0x2000>;
interrupts = <100>;
-
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index 253e6de..4b0c240 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -61,6 +61,8 @@ Example for an AM33xx board:
ti,hwmods = "gpmc";
reg = <0x50000000 0x36c>;
interrupts = <100>;
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
--
2.6.1
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