[PATCH 03/15] arm64: PCI(e) arch support for ioremap function

[Harunobu Kurokawa]

Refered the followings patch:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/269206.html

Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@xxxxxxxxxxx>
---
 arch/arm64/include/asm/io.h |    2 ++
 arch/arm64/mm/ioremap.c     |   13 +++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 44be1e0..cea3651 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -149,6 +149,8 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
 #define IO_SPACE_LIMIT		(PCI_IO_SIZE - 1)
 #define PCI_IOBASE		((void __iomem *)PCI_IO_START)
 
+extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
+
 /*
  * String version of I/O memory access operations.
  */
diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c
index 01e88c8..34f09a6 100644
--- a/arch/arm64/mm/ioremap.c
+++ b/arch/arm64/mm/ioremap.c
@@ -104,6 +104,19 @@ void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size)
 }
 EXPORT_SYMBOL(ioremap_cache);
 
+#ifdef CONFIG_PCI
+int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr)
+{
+	BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT);
+
+	return ioremap_page_range((unsigned long)PCI_IOBASE + offset,
+				  (unsigned long)PCI_IOBASE + offset + SZ_64K,
+				  phys_addr,
+				  __pgprot(PROT_NORMAL_NC));
+}
+EXPORT_SYMBOL_GPL(pci_ioremap_io);
+#endif
+
 /*
  * Must be called after early_fixmap_init
  */
-- 
1.7.9.5

Additionally, I have found out that MSI on R-Car PCIe upstream is broken. You can
workaround this by reverting f075915ac0b11847fcfc8c4d55526a317e71c4d1 and
f075915ac0b11847fcfc8c4d55526a317e71c4d1 until we fix this.


> > with inbound PCI accesses. I am reasonably sure that this problem is hardware
> > related.
> 
> Any news if this is really HW related?
I found out that the PCIe controller HW only supports 32-bit AXI bus addresses, so it
works fine if you limit the available memory. The driver will need some work to use
the IPMMU at some point.

Thanks
Phil

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